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gEDA-dev: hole to hole spacing?
Anyone ever come across design rules on minimum hole spacing which is
more strict that just the minimum copper width?
I'm wondering if pcb needs to check this.
Part of this has come up because currently when you load a board if you
have 2 vias whose copper is touching the 2nd one will be dropped. This
has caused some grief among users. This is especially annoying because
you can move an existing via that close to another but when you reload
the board it will be gone.
One thought I had is to allow vias to touch but include a DRC check for
minimum board material left between drill holes and possibly minimum
center-to-center spacing.
Thoughts?
-Dan
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