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Re: gEDA-dev: Broken slotting
Steve Meier wrote:
> I use it from a method
>
> //-------------------------------------------------------------------
> // if the two pins have the same hierarchical reference designator and
> // pin number then return TRUE else return FALSE
> // we also expect the parents object type to be a complex
>
> BOOL o_pin_compare(OBJECT *first_pin, OBJECT *second_pin)
>
> Specifically I want to know if two hierarchical nets are the same net?
> They are if they share a pin. They can share a pin if one pin is from a
> symbol pin and the other is from a schematic which has a hierarchical
> i/o complex object.
>
>
>
>
This is how I swapped my +5 and -5 power pins. On the symbol +5 was pin
15 and -5 was pin 16. In the schematic I made the Hierarchical IO symbol
for pin 15 hook up to the -5 net and the hierarchical IO symbol for pin
16 hook up to +5. Thus swapping the subcircuit power nets. Even a DRC
check wich looked at the names of the nets could have cought this
effect. Instead I always give the net name closser to the top level
presidence.
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