On Tue, Jul 8, 2008 at 3:35 PM, Peter Clifton <
pcjc2@cam.ac.uk> wrote:
> I don't think there is such a thing as a default directory
> structure. Some gEDA users have their local symbols in a subdir in the
> project directory, others have it in the current directory, while others
> have it in a central location. There was never any consensus on a fixed
> project layout. Some users share schematics and other data files
> between projects. IMHO, staying flexible is a major plus and fits nicely
> with the rest of the gEDA suite.
>
> "Provide mechanism and try not to impose policy"
>
> And in the end what really matters is what you and your mentor
> agree upon.
I'm away until the end of this week, and in intermittent contact.
(Yes.. mid-term evaluations, I know, and will complete it!).
I agree with Ales here on the mechanism, not policy point.
I'd start with the root of your project containing the explicitly added
files, and then have it "feel" its way through those files for
dependencies. (Including a check for recursion).
I'd make the nodes expandable, to reveal their children, and we might
choose to either curtail the tree in case of recursion, or allow it to
be opened infinitely deep (needs writing a custom tree model to handle
that dynamically - can't add infinite nodes!)
I'd guess we might have possibilities of different "filters" to the
view. By directory structure, by category (file-type perhaps?), or just
separating input / output files.
I can do this by adding another notebook tab to the treeview. Xilinx has something similar to this. This can wait until later.
We should take care of the "default" layout (IMO) in the same way as I
solved this for xgsch2pcb. Provide a template projects assistant, and
have it make up the project / directory structure as the template
defines. This is important for managed users like CUED, where the
default templates can be customised to suit a particular work-flow or
project.
I agree on the template part. That way, people will be able to setup their projects that same way that they have had them before. However, this is something that will go on the TODO list and probably won't be touched for quite sometime because I feel that there a more important things to be focused on at the moment.
>
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA
Tel: +44 (0)7729 980173 - (No signal in the lab!)
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