Re: gEDA-dev: Last call for input on SOW for Linux Fund....

[Dan McMahill <dan-at-NOSPAMmcmahill_dot_net>]

John Doty wrote:
> On Dec 2, 2008, at 11:34 AM, al davis wrote:
> 
>> On Tuesday 02 December 2008, John Doty wrote:
>>> On the other hand, we already have in gEDA a simple,
>>> flexible,   concrete, well-documented format for graphics,
>>> attributes, and netlist information: the schematic format. It
>>> can even represent pure netlists without actual graphics. Why
>>> not identify limitations of that format and enhance it?
>> Nice joke.
>>
> 
> Not a joke at all. You are invited to post pointers to clear, concise  
> documentation for a better candidate. But please nothing more like  
> that sales brochure disguised as a Verilog-AMS text you induced me to  
> buy...

I'm sorry you don't like that book and that you haven't found a use for 
Verilog-A or Verilog-AMS.  My experience has been that Verilog-A has 
been critical for many many real life simulation problems.  I'm speaking 
as one who has written thousands of lines of Verilog-A code to solve 
real problems.

I'll reiterate an assertion I made earlier.  One of the big current 
challenges with those two tools is you can't get access currently to 
either without spending a lot of money.  That doesn't mean they aren't 
extremely useful, they're just not widely used outside of companies with 
deep enough pockets to spend a lot on EDA tools.

-Dan


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