Re: gEDA-dev: Last call for input on SOW for Linux Fund....

[al davis <ad151-at-NOSPAMfreeelectron_dot_net>]

On Monday 08 December 2008, John Doty wrote:
> I can understand the motivation to publish the SPICE models.
> But why   don't these guys publish the untranslated models
> too?

Good point ..

I think it is mostly "IP-protection" lawyers, who insist on 
publishing just enough and no more.

To see how extreme this, look at IBIS.  An IBIS model is just a 
bunch of tables, containing only stuff you can read in a data 
sheet or measure.  Yet manufacturers still look for ways to 
encript and obfuscate it.

There is pressure for standardization in models.  To see where 
the model makers get together, go here:
http://www.eigroup.org/cmc/

Here's a place to download models:
http://www.geia.org/Standard-Models-and-Downloads

One of my goals in gnucap is that users can go to a site like 
that and download the models and use them, regardless of the 
language.

I emphasize __users__ here.  You should not need to rebuild the 
simulator to do it.  If the simulator is installed and 
maintained by a system administrator (as it is in many places), 
any user should be able  to try new models.

This is a big reason for the gnucap plugin system, and why 
support for the features THEY use is important.

So, even if you don't use something like Verilog-AMS directly, 
they do, and you use it if you use their models.

Verilog-A is a proper analog-only subset of Verilog-AMS, that is 
supported by all high-end analog simulators.




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