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Re: gEDA: PCB HID status
> My board house has complained about the way that my files have the
> silk removed from pins and pads. (20050609) They said my gerbers
> had a 'negative space' call to get the pads cleared of silk
> information. They dumped my project into hold because of this.
> (something to be aware of).
Yeah, we talked about this before. We have two options:
1. Take out the clears and rely on DRC to warn of silk over pins/pads.
2. Fight back.
Anyway, we should probably keep track of which fabs have problems with
this, even if only to see if it's a bad idea to implement it.