[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: gEDA-dev: Re: Icarus Verilog for post synthesis simulation
Stephen Williams <steve@icarus.com> writes:
> Günter Dannoritzer wrote:
>> Also, does the iSDF plugin support all the primitives generated by
>> Xilinx tools?
>
> I don't know.
Neither do I.
> I also don't know the current status of the iSDF plugin.
I did not look into the vvp code for a long time. Since the structural
concepts in there have evolved quite a bit, I assume there is a lot of
work to do before iSDF can be made working.
> I don't normally bother with back-annotated timing data and never
> feel the need.
Why?
Stephan
--
Stephan Böttcher FAX: +49-431-880-3968
Extraterrestrische Physik Tel: +49-431-880-2508
I.f.Exp.u.Angew.Physik mailto:boettcher@physik.uni-kiel.de
Leibnizstr. 11, 24118 Kiel, Germany
_______________________________________________
geda-dev mailing list
geda-dev@moria.seul.org
http://www.seul.org/cgi-bin/mailman/listinfo/geda-dev