Re: gEDA-dev: New diagram (attempt at UML)

[Steve Meier <smeier-at-NOSPAMalchemyresearch_dot_com>]

On Thu, 2007-03-22 at 15:05 +0000, Peter Clifton wrote:

> 
> Can I have a bus made up of some other buses?
> 

That is the plan, a bus can have sub buses joined to it by a busripper
which has two bus type pins.


> Do those buses have to be of identical type, or can I bundle my Address
> bus and my Data bus into an outer bus representing the physical IO
> cable?
> 

I allow complex buses for example, This works today (VME Data Transfer
Bus) Wich I like because I do with one set of segments what would take
52 sets of segments.

bus=DIO[0-15],AI[1-23],AMI[0-5],DSI0*,DSI1*,LWORDI*,ASI*,BERRI*,DTACKI*,WRITEI*

> Do we mean different things when we speak of hierarchical buses?

Could be, if you are just thinking a complex bus within a schematic
(which is to me a single level of a hierarchical design). I am thinking
about a bus which traverses from level to level of a hierarchical multi
level design.

But if you are just dealing with a single schematic a graphical bus is
all you really need since each of the nets should be named. It is when a
bus traverse a hierarchical boundary causing the bus and thus the
internal nets to be renamed that a non-graphical bus becomes valuable.


Steve Meier



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